Metal-Oxide-Semiconductor-Field-Effect- Transistor(MOSFETs)

Introduction to Power MOSFETs

What is a Power MOSFET?

We all know how to use a diode to implement a switch. But we can only switch with it, not gradually control the

signal flow. Furthermore, a diode acts as a switch depending on the direction of signal flow; we can’t

program it to pass or block a signal. For such applications involving either “flow control” or programmable on/off

switching we need a 3-terminal device…and Bardeen & Brattain heard us and “invented” (almost by accident, like many other great discoveries!) the bipolar transistor. Structurally it is implemented with

only two junctions back-to-back (no big deal; we were probably making common cathodes - same structure -

long before Bardeen). But functionally it is a totally different device which acts like a “faucet” controlling the flow of emitter current - and the “hand” manipulating the faucet is the base current. A bipolar transistor is therefore a currentcontrolled device. The Field Effect Transistor (FET), although structurally different, provides the same “faucet” function. The difference: the FET is voltagecontrolled; one doesn’t need base current but voltage to exercise flow control. The bipolar transistor was born in 1947; the FET (at least the concept) came soon after, in 1948 from another pair of illustrious parents: Shockley and Pearson. The terminals are called DRAIN instead of COLLECTOR, GATE instead of BASE and SOURCE instead of EMITTER to differentiate it from his older bipolar “cousin”. The FET comes in two major variants, optimized for different types of applications: the JFET (junction FET) used in small-signal processing and the MOSFET (metal-oxidesemiconductor FET) mainly used in linear or switching power applications.

Why Did They Need to Invent the Power MOSFET?

When scaled-up for power applications the bipolar transistor starts showing some annoying limitations. Sure, you can still find it in your washing machine, in your air conditioner and refrigerator but these are “low” power applications for us,the average consumer, who can tolerate a certain degree of inefficiency in his appliances. Transistors are still used in some UPSs, motor controls or welding robots but their usage is practically limited to less than 10kHz and they

are rapidly disappearing from the “technology edge” applications where overall efficiency is the “key” parameter (SMPSs, sophisticated motor controls, converters, to name a few). Being a bipolar device, the transistor relies on the minority carriers injected in the base to “defeat” recombination and be re-injected in the collector. In order to sustain a large collector current we want to inject many of them in the base from the emitter side and, if possible, recuperate all of them at the base/collector boundary (meaning that recombination in the base should be kept at a minimum). But this means that when we want the transistor switched off, there will be a considerable amount of minority carriers in the base with a low recombination factor to be taken care of before the switch can close – in other words the stored charge problem associated with all minority carrier devices limiting the maximum operating speed. The major advantage of the FET now comes to light: being a majority carrier device there is no stored minority charge therefore it can work at much higher frequencies. The switching delays characteristic to mosfets are rather a consequence of the charging and discharging of the parasitic capacitors. One may say: I see the need for a fast switching mosfet in high frequency applications but why should I use such device in my relatively slow switching circuitry? The answer is straightforward: improved efficiency. The device sees both high current and high voltage during the interval in which switching occurs; a faster device will therefore experience proportionally less energy loss. In many applications this advantage alone more than compensates for the slightly higher conduction losses associated with higher voltage mosfets: switch-mode power supplies (smps) operating beyond 150 kHz would not be possible without them. The bipolar transistor is current driven; in fact the more current we want to drive, the more current we need to supply to the base because the gain (ratio of the collector and base currents) drops significantly as the collector current (IC) increases. One consequence is that the bipolar transistor starts dissipating significant control power, reducingthe overall efficiency of the circuitry. To make things worse this drawback is accentuated at higher operating temperatures. Another consequence is the need for rather complicated base drive circuitry capable of fast current sourcing and sinking. Not the (MOS)FET; this device has practically zero current consumption in the gate; even at 125°C the typical gate current stays below 100 nA. Once the parasitic capacitances are charged, only the very low leakage currents have to be provided by the drivers. Add to this the circuit simplicity resulting from driving a device with voltage rather than current and you’ll spot another reason why the (MOS)FET is so appealing to the design engineer.

Basic Structure and Principle of Operation

The n-type Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) consists of a source and a drain, two highly conducting n-type semiconductor regions which are isolated from the p-type substrate by reversed-biased p-n diodes. A metal (or poly-crystalline) gate covers the region between source and drain, but is separated from the semiconductor by the gate oxide. The basic structure of an n-type MOSFET and the corresponding circuit symbol are shown in figure

mosfet2.gif

Fig:- Crosssection and circuit symbol of an n-type Metal-Oxide-Semiconductor-Field-Effect-Transistor (MOSFET)

As can be seen on the figure the source and drain regions are identical ¹. It is the applied voltages which determine which n-type region provides the electrons and becomes the source, while the other n-type region collects the electrons and becomes the drain. The voltages applied to the drain and gate electrode as well as to the substrate by means of a back contact are refered to the source potential, as also indicated on the figure.

A top view of the same MOSFET is shown in Fig. 7.1.2, where the gate length, L, and gate width, W, are identified. Note that the gate length does not equal the physical dimension of the gate, but rather the distance between the source and drain regions underneath the gate. The overlap between the gate and the source and drain region is required to ensure that the inversion layer forms a continuous conducting path between the source and drain region. Typically this overlap is made as small as possible in order to minimize its parasitic capacitance.

mosfet1.gif

Fig:- Top view of an n-type Metal-Oxide-Semiconductor- Field-Effect-Transistor (MOSFET)

The flow of electrons from the source to the drain is controlled by the voltage applied to the gate. A positive voltage applied to the gate, attracts electrons to the interface between the gate dielectric and the semiconductor. These electrons form a conducting channel between the source and the drain, called the inversion layer. No gate current is required to maintain the inversion layer at the interface since the gate oxide blocks any carrier flow. The net result is that the current between drain and source is controlled by the voltage which is applied to the gate.

The typical current versus voltage (I-V) characteristics of a MOSFET are shown in the figure below. Implemented is the quadratic model for the MOSFET.

MOSFET construction

Gate material

The primary criterion for the gate material is that it is a good conductor. Highly-doped polycrystalline silicon is an acceptable but certainly not ideal conductor, and also suffers from some more technical deficiencies in its role as the standard gate material. Nevertheless, there are several reasons favoring use of polysilicon:

1. The threshold voltage (and consequently the drain to source on-current) is modified by the work function difference between the gate material and channel material. Because polysilicon is a semiconductor, its work function can be modulated by adjusting the type and level of doping. Furthermore, because polysilicon has the same bandgap as the underlying silicon channel, it is quite straightforward to tune the work function to achieve low threshold voltages for both NMOS and PMOS devices. By contrast, the work functions of metals are not easily modulated, so tuning the work function to obtain low threshold voltages becomes a significant challenge. Additionally, obtaining low-threshold devices on both PMOS and NMOS devices would likely require the use of different metals for each device type, introducing additional complexity to the fabrication process.

2. The Silicon-SiO₂ interface has been well studied and is known to have relatively few defects. By contrast many metal–insulator interfaces contain significant levels of defects which can lead to Fermi-level pinning, charging, or other phenomena that ultimately degrade device performance.

3. In the MOSFET IC fabrication process, it is preferable to deposit the gate material prior to certain high-temperature steps in order to make better-performing transistors. Such high temperature steps would melt some metals, limiting the types of metal that can be used in a metal-gate-based process.

While polysilicon gates have been the de facto standard for the last twenty years, they do have some disadvantages which have led to their likely future replacement by metal gates. These disadvantages include:

1. Polysilicon is not a great conductor (approximately 1000 times more resistive than metals) which reduces the signal propagation speed through the material. The resistivity can be lowered by increasing the level of doping, but even highly doped polysilicon is not as conductive as most metals. In order to improve conductivity further, sometimes a high-temperature metal such as tungsten, titanium, cobalt, and more recently nickel is alloyed with the top layers of the polysilicon. Such a blended material is called silicide. The silicide-polysilicon combination has better electrical properties than polysilicon alone and still does not melt in subsequent processing. Also the threshold voltage is not significantly higher than with polysilicon alone, because the silicide material is not near the channel. The process in which silicide is formed on both the gate electrode and the source and drain regions is sometimes called salicide, self-aligned silicide.

2. When the transistors are extremely scaled down, it is necessary to make the gate dielectric layer very thin, around 1 nm in state-of-the-art technologies. A phenomenon observed here is the so-called poly depletion, where a depletion layer is formed in the gate polysilicon layer next to the gate dielectric when the transistor is in the inversion. To avoid this problem, a metal gate is desired. A variety of metal gates such as tantalum, tungsten, tantalum nitride, and titanium nitride are used, usually in conjunction with high-k dielectrics. An alternative is to use fully-silicided polysilicon gates, a process known as FUSI.

Insulator

As devices are made smaller, insulating layers are made thinner, and at some point tunneling of carriers through the insulator from the channel to the gate electrode takes place. To reduce the resulting leakage current, the insulator can be made thicker by choosing a material with a higher dielectric constant. To see how thickness and dielectric constant are related, note that Gauss' law connects field to charge as:

,

with Q = charge density, κ = dielectric constant, ε₀ = permittivity of empty space and E = electric field. From this law it appears the same charge can be maintained in the channel at a lower field provided κ is increased. The voltage on the gate is given by:

,

with V_G = gate voltage, V_ch = voltage at channel side of insulator, and t_ins = insulator thickness. This equation shows the gate voltage will not increase when the insulator thickness increases, provided κ increases to keep t_ins /κ = constant (see the article on high-κ dielectrics for more detail, and the section in this article on gate-oxide leakage).

The insulator in a MOSFET is a dielectric which can in any event be silicon oxide, but many other dielectric materials are employed. The generic term for the dielectric is gate dielectric since the dielectric lies directly below the gate electrode and above the channel of the MOSFET.

Junction design

The source-to-body and drain-to-body junctions are the object of much attention because of three major factors: their design affects the current-voltage (I-V) characteristics of the device, lowering output resistance, and also the speed of the device through the loading effect of the junction capacitances, and finally, the component of stand-by power dissipation due to junction leakage.

MOSFET showing shallow junction extensions, raised source and drain and halo implant. Raised source and drain separated from gate by oxide spacers.

The drain induced barrier lowering of the threshold voltage and channel length modulation effects upon I-V curves are reduced by using shallow junction extensions. In addition, halo doping can be used, that is, the addition of very thin heavily doped regions of the same doping type as the body tight against the junction walls to limit the extent of depletion regions.^[33]

The capacitive effects are limited by using raised source and drain geometries that make most of the contact area border thick dielectric instead of silicon. ^[34]

These various features of junction design are shown (with artistic license) in the figure.

Junction leakage is discussed further in the section increased junction leakage.

How does a MOSFET Amplify Electrical Signals?

While a minimum requirement for amplification of electrical signals is power gain, one finds that a device with both voltage and current gain is a highly desirable circuit element. The MOSFET provides current and voltage gain yielding an output current into an external load which exceeds the input current and an output voltage across that external load which exceeds the input voltage.

The current gain capability of a Field-Effect-Transistor (FET) is easily explained by the fact that no gate current is required to maintain the inversion layer and the resulting current between drain and source. The device has therefore an infinite current gain in DC. The current gain is inversely proportional to the signal frequency, reaching unity current gain at the transit frequency.

The voltage gain of the MOSFET is caused by the fact that the current saturates at higher drain-source voltages, so that a small drain current variation can cause a large drain voltage variation.

How an n-Channel MOSFET works

Field Effect Transistor (FET) is a Semiconductor device with four terminals (Gate, Source, Drain and Substrate), Figure 1. FET is a Unipolar device because Current is produced by one type of Charge Carrier (Electrons or Holes) depending on the type of FET (n-Channel or p-Channel), unlike the Bipolar Junction Transistor (BJT), in which Current is produced by both Electrons and Holes. Metal Oxide Semiconductor FET (MOSFET) is a category of FET. The MOSFET schematic symbols, Figure 2 and Figure 3, have an arrowhead which indicates the polarity of the p-n Junction between the Substrate and the Channel. The following explanation focuses on the n-Channel Enhancement Mode MOSFET.

Figure: Field Effect Transistor

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